Coupling device using buried capacitors in multilayered substrate

ABSTRACT

The present invention proposes a coupling device, comprising a substrate ( 1 ), a conductive layer ( 2 ) covering a first surface of said substrate ( 1 ), at least two electromagnetically coupled lines ( 3   a,    3   b ) being provided opposite to said first surface and at least one thereof being covered by at least one cover layer ( 4, 5 ) wherein at least one capacitor (C 1,  C 2,  C 3,  C 4 ) is connected between a first end of at least one of said at least two lines ( 3   a,    3   b ) and said conductive layer ( 2 ). The at least one capacitor is a buried capacitor grounded in order to equalize unequal phase velocities otherwise degrading the performance of e.g. broadside coupled structures in an inhomogeneous substrate structure such as for example microstrips in a multilayer LTCC. Therefore the present invention enables coupling devices having a high performance and offering in that way the best of all possible design scenarios in terms of wideband performance, size and cost.

FIELD OF THE INVENTION

[0001] The present invention relates to a coupling device. Moreparticularly, the present invention relates to a coupling deviceobtainable from a multilayer integrated circuit technology fabricationprocess.

BACKGROUND OF THE INVENTION

[0002] Coupling devices (referred to as couplers) in general, such asfor example Hybrid 3 dB couplers, are essential circuit components whichare increasingly being used for high performance applications in suchdiverse circuits as RF mixers, amplifiers and modulators. In additionthey can be used in a variety of other support functions such as theones encountered in general RF signal and amplitude conditioning anderror signal retrieval systems.

[0003] The expression “hybrid” in connection with couplers means anequal split of power between two (output) ports of the coupler withrespect to an input port. Hence a 3 dB coupler is a “hybrid” since:

10 log(Power_(out)/Power_(in))=−3 dB

Power_(out)/Power_(in)=10^((−3/10))=0.5

[0004] So the output power Powerout of one of the output ports is half(−3 dB) of the input power Power_(in), the other half emerges from theother output port. If we consider FIG. 1 (to be explained in greaterdetail later on) and say that port P1 is the input port, then port P4 issaid to be the coupled port and port P2 is said to be the direct portwith half the input power being output from each of the output ports.Port P3 is said to be isolated from port P1. Note that the output at thecoupled port will experience a phase shift dependent on the couplinglength, while the output at the direct port will not experience a phaseshift (with reference to the input supplied at the input port).

[0005] The use of couplers in the 1-5 GHz range though has been at theexpense of large area of occupation required for such couplers andfabrication tolerance problems resulting from tight gap dimensioning for3 dB coupling operation when implemented in PCB technology (PCB=PrintedCircuit Board). More precisely, when implementing a coupler in PCBtechnology, it is necessary to accurately provide a gap between couplinglines of a coupler with the designed dimensions, since otherwise thecoupler will not perform properly.

[0006] To address fabrication issues, narrow-band equivalents thatcompromise even more the size of the circuit such as branch linecouplers have been utilized. Other alternatives such as SMD type(SMD=Surface Mounted Device) hybrid couplers have been used that offerbetter size ratios but are still quite large for future systems of smallsize with increased functionality. Often SMD component type couplersrequire additional external matching components to optimize theirperformance in terms of isolation and matching as well as amplitude andphase balance and therefore even further compromise the circuit area.Stated in other words, the provision of externally provided SMDcomponents for matching purposes further increases the entire size ofthe coupler and requires additional soldering processes for solderingthe externally provided SMD components. The increased use of SMDcomponents increases costs and the use of soldering connectionscompromises the environmental friendliness and reduces the reliabilityof a manufactured subsystem module, since each solder connectionrepresents a potentially source of errors.

[0007] Stripline technology has also been utilized for the design ofhigh performance couplers but it suffers from the need to accommodatefor larger volume/size for a given component inflicting additionallymore materials costs.

[0008] Low loss performance can also be an issue especially in LNAdesigns (LNA=Low Noise Amplifier) as well as in high efficiency poweramplification and linearisation applications. For such applications thedB on loss performance is a critical issue. Current designs offertypically 0.3 dB loss performance per coupler.

[0009] To rectify the above problems and address the performancerequirements of future miniaturized circuit subsystems, widebandcouplers in terms of isolation, matching and amplitude and phase balanceare required that are additionally fabrication tolerance resistant andof much smaller size than its predecessors.

[0010] Size can be decreased by using an appropriate integrationtechnology as well as a miniaturization circuit technique. Multilayerintegrated circuits such as multilayer ceramic LTCC/HTCC (LTCC=LowTemperature Cofired Ceramics, HTCC=High Temperature Cofired Ceramics)technologies have been identified as a technology of greatminiaturization potential since three dimensional design flexibility iscombined with ceramic materials of high dielectric constant (ε). Lossperformance is enabled by the careful choice of materials and circuitgeometry as well as topology.

[0011] Isolation/matching and amplitude and phase balance performancecan be optimized by using a suitable circuit technique or geometry.

[0012]FIG. 1 shows an equivalent circuit diagram of a conventionallyknown coupler. Basically, a coupling device consists of a pair ofcoupled lines 3 a, 3 b. Each line has two ports for inputting/outputtingelectrical and/or electromagnetic signals to be coupled. Thus, as shownin FIG. 1, the line 3 a has ports P1, P2, while the line 3 b has portsP3, P4. Each port P1 through P4 is terminated with a terminationimpedance Z₀. In a 50 Ohms system, the value of Z₀ is set to 50 Ohms.The lines 3 a, 3 b have equal length which is expressed in terms of thewavelength for which the coupler is designed. The parameter le° denotesthe electric length of the coupler which is measured in degrees (°). Forexample, for the coupler shown in FIG. 1, the length is assumed to beλ/4, with λ being the center frequency of operation for which thecoupler is designed. Thus, in such a case, a signal fed to the couplerat port P1 and used as a reference is coupled to the port P4 (coupledport) with its phase shifted (indicated by “−90°”). Port P3 is isolatedfrom port 1, which means that no power reaches port P3 from port P1. Thesignal at port P2 (the direct port) is not shifted with reference to thesignal input at port P1 as indicated by 0°. Note that in case of a 3 dBcoupler as an example, the power input at port P1 is split between portsP2 (direct port) and P4 (coupled port) Nevertheless, other line lengthssuch as λ/2, or odd multiples of λ/4 such as 3λ/4 are possible. Also,the lines could have different lengths, while in such a case only thelength of the lines over which the lines are facing each otherrepresents an effective coupling length (electric length le in [°]). Thecoupler, i.e. the coupling lines, may be described in terms of the evenand odd propagation modes of electromagnetic waves travelling therethrough and their respective characteristic impedances Z_(oo), Z_(oe)and phase velocities υ_(oe) and υ_(oo) and the electric length le of thecoupling lines.

[0013] In 3 dB coupling in a 50 Ohms system, one needs to design thelines to have impedance values Z_(oo) and Z_(oe) of 20.7 and 120.7 Ohmsrespectively. The above arrangement though assumes equal phasevelocities for the even and the odd modes i.e. υ_(oe)=υ_(oo).

[0014] If the phase velocities of the two modes (even and odd mode) areunequal, then isolation and matching at the centre frequency ofoperation suffers. More precisely, the undesired unequal phasevelocities are typical for all transmission lines that are not strictlyTEM (Transverse-Electro-Magnetic), often referred to as Quasi-TEMtransmission lines such as for example a microstrip line. This isinvariably the case with most couplers that use a pair of microstriplines.

[0015] The problem of unequal phase velocities could be prevented by theuse of true TEM transmission lines such as coupled striplines. However,in such a case at least one extra metallization layer is required whichis not desired in terms of costs, involved.

[0016]FIG. 7 shows in a rough outline the difference between a striplineand microstrip arrangement, respectively. The left hand portion of FIG.7 shows a stripline arrangement, while the right hand portion shows amicrostrip arrangement. It is an important property of any two-conductorlossless transmission lines (coupling lines) placed in a uniformdielectric substrate (homogeneous and/or symmetrical substrate) that itsupports a pure TEM mode of propagation. A common example of these typesof lines is STRIPLINE, as shown in FIG. 7, left portion. However if atransmission line is placed in an inhomogenous (and/or non-symmetric)dielectric substrate it can no longer support fully-TEM propagationbecause the electromagnetic wave now propagates mostly within thesubstrate, but some of the wave is now able to propagate in air also.The most common example of this is MICROSTRIP also shown in FIG. 7,right portion. Stripline couplers are encased in a homogenous substratewhere the electromagnetic fields of the coupler are confined within thesubstrate by the two ground planes (conductive layers) While for amicrostrip line its electromagnetic propagation takes place mainlywithin the substrate (in fact most of the power propagates within thesubstrate), but some of the power propagates outside the substrate whichis usually air.

[0017]FIG. 2 shows a cross section of a coupler (in microstriparrangement) as represented in FIG. 1, while FIG. 2 shows coupled lineson the surface (FIG. 2a) or embedded (FIG. 2b) within a substrate asalternative microstrip arrangement implementations.

[0018] As shown in FIG. 2(a), the coupling device comprises a substrate1 made of a dielectric material of a dielectric constant ε_(r), aconductive layer 2 covering a first surface of said substrate 1 (the“bottom” side), and (at least) two lines 3 a, 3 b being providedelectrically separated from each other at a second surface of saidsubstrate 1 opposite to said first surface (the “top” side). Note thatthe same reference numerals as those used in FIG. 1 denote the likecomponents such that a repeated explanation thereof is omitted. Said twolines 3 a, 3 b are laterally spaced apart from each other, with theamount of spacing (i.e. the width of a gap there between) adjusts thedegree of electromagnetic coupling between said two lines. Although onlytwo lines are shown, more than two lines may be used for couplingpurposes dependent on the specific purpose for which the coupler isdesigned. Moreover, said conductive layer 2, in operation of the device,is connected to ground potential.

[0019] The coupler shown in FIG. 2(a) is generally known as an edgecoupled coupling device, since coupling occurs between the elongatedsides/edges in lengthwise direction of the lines facing each other (in adirection vertical to the drawing plane in FIG. 2(a)).

[0020] It is typical in such edge coupled microstrip line couplers thatthe odd mode velocity is higher than the even mode velocity i.e.υ_(oo)>υ_(oe). Compensation techniques that improve isolation andmatching and retain the amplitude and phase balance to good bandwidthshave been dealt with previously. The main issue with these techniques isthat such edge coupled couplers suffer from fabrication tolerances (gapdimension requirement such as small gap, constant over the entire lengthof the striplines), and therefore their use is not generally suggested.

[0021] The case when the even mode velocity is higher than the odd modevelocity (i.e. υ_(oe)>υ_(oo)) is a case that is encountered in the caseof partially embedded broadside coupled microstrips (i.e. at least onecoupling line being embedded).

[0022] Such a broadside coupled coupling device is illustrated in FIG.2(b). Note that the same reference numerals as those used in FIG. 1denote the like components such that a repeated explanation thereof isomitted. As shown, a broadside coupled coupling device comprises asubstrate 1 made of a dielectric material of a dielectric constantε_(r), a conductive layer 2 covering a first surface of said substrate 1(the “bottom” side), (at least) two electromagnetically coupled lines 3a, 3 b being provided opposite to said first surface and being coveredby at least one cover layer 4, 5.

[0023] The (at least) two lines 3 a, 3 b are arranged at differentdistances from said first surface of said substrate 1, with a differencebetween the distances in which said two lines 3 a, 3 b are arranged fromsaid first surface of said substrate 1 is determined by a thickness of afirst cover layer 4 covering a first line 3 b of said at least twolines. As shown in FIG. 2(b), the first line 3 b and second line 3 a ofsaid two lines are arranged such that they fully overlap each other inthe cross-sectional representation. Nevertheless, this is not absolutelyrequired and it is sufficient that they at least partly overlap eachother. The amount of overlap (and of course the distance between thelines in “vertical” direction within the substrate) adjusts the degreeof electromagnetic coupling between said at least two lines. Such anoverlap is illustrated in FIG. 3B.

[0024] A second cover layer 5 is arranged to cover at least the secondline 3 a of said two lines. This means that as shown, the second coverlayer 5 also covers the first cover layer. However, this is notabsolutely required, while from a viewpoint of simplified productionnevertheless desirable. The at least one cover layer 4, 5 is for exampleof the same material as said substrate 1. Moreover, said conductivelayer 2, in operation of the device, is connected to ground potential.

[0025] Note that the arrangement shown in FIG. 2(a) may additionally becovered with a cover layer (not shown) so that either an edge coupledburied coupling device is obtained in case the cover layer is adielectric material (e.g. the same as the substrate material), or anedge coupled coated coupling device is obtained in case the cover layeris e.g. a resist pattern.

[0026]FIG. 3 shows a further arrangement of a coupling device. FIG. 3Bshows a coupling device in cross section with at least partlyoverlapping coupling lines as mentioned herein above. FIG. 3A shows atop view and/or layout view of the coupling device shown in FIG. 3B.Ports P1 and P2 are interconnected by the coupling line 3 a which isarranged above the coupling line 3 b interconnecting ports P4 and P3.Coupling line 3 a and ports P1, P2 are illustrated in a differentlyhatched illustration as compared to coupling line 3 b and ports P4 andP3.

[0027] Still further, the arrangements of FIGS. 2(a) and 2(b) and orFIG. 3 may be combined if e.g. more than two coupled lines are presentin the coupling device. This means that for example edge coupledcoupling lines may in turn be broadside coupled to one or more othercoupling lines provided for in the arrangement.

[0028] Note also, that as the production technology for such devices,the multilayer integrated circuit technology which is assumed to be wellknown to those skilled in the art may be used so that a detaileddescription of the method for production of such devices is consideredto be dispensable.

[0029] To the best of our knowledge there have not been suggested anytechniques that compensates the velocity of the even and odd modes whenthe situation is encountered that the even mode velocity is higher thanthe odd mode velocity. Thus, in such a case, the above discussedproblems inherent to coupling devices in connection with unequal phasevelocities still remain.

SUMMARY OF THE INVENTION

[0030] Consequently, it is an object of the present invention to providea coupling device which is free from such drawbacks inherent to couplingdevices in connection with unequal phase velocities.

[0031] According to the present invention, this object is for exampleachieved by a coupling device, comprising a substrate, a conductivelayer covering a first surface of said substrate, at least twoelectromagnetically coupled lines being provided opposite to said firstsurface and at least one of which lines being covered by at least onecover layer, wherein at least one capacitor is connected between a firstend of at least one of said at least two lines and said conductivelayer.

[0032] Advantageous further developments are as defined in therespective dependent claims.

[0033] Accordingly, a coupling device according to the present inventionis proposed as a circuit technique that optimizes the couplerperformance in terms of isolation and matching. This technique isparticularly suited to a practical circuit topology that can beimplemented in LTCC/HTCC technology while this topology is also suitedfor low loss performance and has increased miniaturization potential. Assuch both, i.e. size and performance can be optimized while the addedperformance can be used to trade off with any fabrication tolerancesincurred during fabrication.

[0034] In addition, using the proposed technique all the performanceproperties can be retained over a wide bandwidth. The technique is alsosuited to multilayer IC (IC=Integrated Circuit) technologies such as theones encountered for example in multilevel metal SiGe(Silicon-Germanium) and multilayer thin film processes. It should benoted though that the cost of implementing couplers in the 1-6 GHzregion well justifies the use of multilayer ceramic integrated circuittechnology (e.g. LTCC) as opposed to the significantly more expensiveSi/GaAs (silicon/gallium arsenide) IC and thin film approaches.

[0035] The invention presents a signal coupling structure with a new(unequal phase velocity) compensation method applied in a multilayerstructure. The unequal phase velocities of two coupled microstrip linesare compensated by using buried capacitors in the multilayer structure.In particular, the present invention is applicable to broadside coupledmicrostrips arrangements. Buried capacitors are added in order tocompensate the unequal phase velocities related to two broadside coupledmicrostrip lines. After the phase velocities are compensated (i.e. theat least one capacitor is added), the phase velocities of the two modesare equal and therefore no forward coupling exists: Thus, the isolationis improved significantly.

[0036] As integrated in the multilayer ceramic substrate, this structuresaves cost and size. Also, it increases the reliability, since no SMDcomponents are required. Electrical performance, especially isolation,is enhanced by the use of the capacitors.

[0037] According to the present invention, a novel compensationtechnique has been suggested that among others enables the use ofbroadside coupled microstrip line components embedded in multilayerstructures.

[0038] The technique effectively enables a design topology that thoughit offers structural convenience, miniature size and low lossperformance, would otherwise suffer from low isolation and matchingperformance.

[0039] Therefore the present invention enables coupling devices having ahigh performance combined with the above advantages, offering in thatway the best of all possible design scenarios in terms of widebandperformance, size and cost.

[0040] The coupling device according to the present invention isparticularly suitable for being used for high performance applicationsin such diverse circuits as RF mixers, amplifiers (e.g. low noiseamplifiers LNA) and modulators. In addition it can be used in a varietyof other support functions such as the ones encountered in general RFsignal and amplitude conditioning and error signal retrieval systems.

BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The above and other objects, features and advantages of thepresent invention will be more readily understood upon referring to theaccompanying drawings, in which:

[0042]FIG. 1 shows an equivalent circuit diagram of a conventionallyknown coupler;

[0043]FIG. 2 shows a cross section of a coupler as represented in FIG.1, with FIG. 2 showing coupled lines on the surface of (FIG. 2) orembedded (FIG. 2b) within a substrate;

[0044]FIG. 3A shows a layout (top view) of a coupling device accordingto a modification of the coupler shown in FIG. 2(b),

[0045]FIG. 3B shows a cross section of a coupler as represented in itslayout in FIG. 3A;

[0046]FIG. 4 shows an equivalent circuit diagram of a coupling deviceaccording to the present invention;

[0047]FIG. 5A shows a layout (top view) of a coupling device accordingto the present invention as shown in FIG. 4,

[0048]FIG. 5B shows a cross sectional view through the ports P1-P4 ofthe coupling device shown in FIG. 5A;

[0049]FIG. 5C shows a top view on an alternative capacitor implemention;

[0050]FIG. 5D shows a cross sectional view of such an alternativecapacitor implementation being incorporated in the coupling device

[0051]FIG. 6A shows a plot of measurement results for a conventionalcoupler, while

[0052]FIG. 6B shows a plot of measurement results for a coupling deviceaccording to the present invention; and

[0053]FIG. 7 shows a structural comparison between basic stripline andmicrostrip coupler device arrangements.

DETAILED DESCRIPTION OF THE EMBODIMENTS

[0054] Subsequently, the present invention will be described in detailwith reference to the accompanying drawings.

[0055]FIG. 4 shows an equivalent circuit diagram of a coupling deviceaccording to the present invention. The arrangement is rather similar tothe circuit arrangement as explained as an example with reference toFIG. 1. Thus, the same reference signs denote similar and/or identicalcomponents and a repeated explanation thereof is dispensed with.

[0056] The difference between the equivalent circuits shown in FIG. 1and FIG. 4 resides in that in the circuit according to FIG. 4, groundedcapacitors C1 through C4 are connected at the output ports P1 to P4,respectively. With the values of capacitance of the capacitors C1 to C4being properly chosen, the phase velocity mismatch between odd and evenmodes can be compensated for, i.e. equalized. The proper values ofcapacitance of the capacitors C1 to C4 depend on the degree of velocitymismatch. These proper values are determined before manufacturing on thebasis of e.g. simulation results of the coupler based on the other knownparameters of the coupler device.

[0057] Note that although FIG. 4 shows four capacitors, according to thepresent invention it is not necessarily the case that four capacitorsare connected. Rather, at least one capacitor (C1, C2, C3, C4) isconnected to a first end (i.e. at one of ports P1, P2 or P3, P4) of atleast one of said at least two lines 3 a, 3 b, and grounded. It is alsoto be noted that the present invention is not limited to λ/4 linelengths but may be applicable to all conceivable coupling line lengthssuch as for example λ/2 or 3λ/4.

[0058] Note also that the capacitors, upon manufacturing the device, areonly adapted to be grounded, i.e. connectable to ground, while therespective actual connection to ground is established only whenoperating the device.

[0059] As mentioned beforehand, FIG. 2 shows the typical structuralcases in which unequal phase velocities (which have to be compensated)may occur. FIG. 2(b) is a specific case of the arrangement generallyshown in FIG. 3B. This will serve as an example to which the proposednovel technique according to the present invention will be applied. Thepresent invention being for example applied to such a broadside coupledmicrostrip structure as shown in FIG. 3B, is shown in FIG. 5B.

[0060]FIG. 5B shows a cross sectional view through the ports P1-P4 ofthe coupling device shown in FIG. 5A. FIG. 5A shows a layout (top view)of a coupling device according to the present invention as shown in FIG.4.

[0061] Generally, the broadside coupled microstrip structure is a veryuseful design structure that can adjust the amount of coupling by theamount of offset between the two microstrip lines. (For example, it mayroughly be said to be adjusted to its maximum coupling degree in case ofno offset (see FIG. 2(b)) and be adjusted towards its minimum couplingdegree with increasing offset). Nevertheless, although as an exampleonly the present invention is applied to a structure as shown in FIG.3B, resulting in an arrangement shown in FIG. 5B, it is to be noted thatthe present invention may also be applied to structure as shown in FIG.2(b), or a combination of the structures illustrated in FIGS. 2(b)and/or 3B (the combined structure then having at least three couplinglines).

[0062] In FIG. 5B the same reference signs denote the same or likecomponents as in the previous Figures. The difference between FIG. 5Band FIG. 3B resides in the provision of buried capacitors C1, C4. Moreprecisely, C1 and C4, respectively, in FIG. 5B denote a conductivemember embedded in said substrate 1 and facing said conductive layer 2covering said first surface of said substrate 1. The conductive membermay be any suitable conductive member that may have been applied forexample by suitable lithography techniques to the substrate 1 and wasthereafter buried by additionally applied substrate material. Note thatthe conductive member may be provisioned by depositing conductivematerial in the desired shape for the member using known depositionprocesses such as CVD (Chemical Vapor Deposition) or PVD (Physical VaporDeposition) processes, or using known (thin or thick) film printingprocesses applying e.g. a conductive paste, or by using selectiveetching processes etching away excess parts of a conductive member, etc.Generally, it should be noted that the present invention is notrestricted to any particular multilayer process but that any suitablemultilayer process technology may be used.

[0063] Each of such members is connected by means of a respectiveelectrical connection W1, W4 from said first end (i.e. port P1, P4) ofsaid at least one of said (at least) two lines 3 a, 3 b to saidconductive member C1, C4. Such a connection may be established byproviding a via hole connection.

[0064] Note that the capacitance of said capacitors (C1 to C4) isdetermined by the area of said conductive member C1, C4, the distancebetween said conductive member C1, C4 and said conductive layer 2covering said first surface of said substrate 1, and the dielectricconstant ε_(r) of said substrate 1 there between. It is to be noted thatalthough the members C1 and C4 in FIG. 5B are shown to be equally spacedapart from the conductive layer 2, it is also conceivable that accordingto the required capacitance value required for a specific case, themembers C1, C4 may be located at different distances from the conductivelayer 2. In such a case, however, the production would require moreproduction steps. (If e.g. all four conductive members involved inconstituting the capacitors in the chosen example are at the samedistance from the conductive layer, one production sub-cycle forproviding the members is needed, while if all four conductive membersinvolved in constituting the capacitors are at a different distance fromthe conductive layer, four such production sub-cycles for providing themembers are needed.)

[0065] Note that the coupling line 3 a in FIG. 5B need not necessarilybe covered by a cover layer 5, but that the cover layer 4 coveringcoupling line 3 b and separating the coupling lines 3 b, 3 a from eachother in vertical direction, could be sufficient. Further, cover layers4 and/or 5 may be of the same material as the substrate 1, but are notlimited to such a material so that the multilayer arrangement maycomprise layers (substrate/cover layer(s)) of different dielectricconstants, if appropriate. Even the cover layers 4 and 5 may be ofdifferent material's each of which differs from the substrate material.

[0066]FIG. 5C illustrates an alternative for implementing a capacitoraccording to the present invention. There are two common forms ofcapacitors that are practically used in real implementation of thecoupling device according to the present invention. One is referred toas a parallel plate capacitor as explained above in connection with FIG.5B, while the other is named an “interdigitated” capacitor (see FIG.5C). The interdigitated capacitor may particularly be used to achievesmall value capacitors. As shown in FIG. 5C, its capacitor value isprimarily defined by the number of fingers it has (N), the width of eachfinger (W), the separation between each finger (S), the length of eachfinger (L), and the dielectric constant (εr) of the substrate. One partof the conductive member constituting an interdigitated capacitor isconnected, e.g. by means of a via hole connection, to the conductivelayer 2 serving as a ground plane in operation of the coupling device.Note that the interdigitated capacitor, i.e. its two interdigitatedparts are located in one plane.

[0067]FIG. 5D shows a partly cross section through the interdigitatedcapacitor of FIG. 5C along the dashed line in FIG. 5C, when such acapacitor is connected to a coupling line in a substrate. Same referencenumerals denote the same or like components as in the previous Figures.FIG. 5D thus illustrates an example case in which capacitor C4 isrealized as an interdigitated structure, one part thereof beingconnected with via connection W4 to line 3 b while the other partthereof being connected by means of another connection W5 (via holeconnection) to the conductive layer 2. Note that one or more or even allcapacitors may be interdigitated capacitors and may also be used incombination with one (or more) parallel plate capacitor(s). Note thatFIG. 5D only shows a part of the entire coupling structure and forexample cover layer 5 and line 3 a are omitted from the representationin FIG. 5D. Also, the scale in FIG. 5D may deviate from a drawing scaleused in other figures. Additionally, the coupling device is not shown inits entire length but only its region at port P4 is shown.

[0068] Since the capacitors (conductive members) are below the structureof the microstrip lines 3 a, 3 b, the area of the circuit is notincreased. The capacitors are effectively being created monolithicallywithin the multilayer sructure and there is no need to use SMDcapacitive components that would adversely affect the performance. Thecircuit can be designed as a whole, thus electromagnetically guarantyingits performance.

[0069]5A shows a layout (top view) of a coupling device according to thepresent invention. FIG. 5A is substantially similar to FIG. 3A with theexception that the conductive members C1, C4 constituting the capacitorsC1, C4 (in FIG. 5B) and the conductive members C2, C3 are additionallyshown. Note that the coupling lines 3 a, 3 b are designed as a meandertype line in order to further decrease the required area for thecoupling device.

[0070] The present inventors have manufactured prototypes of embeddedbroadside coupled line 90° (λ/4) coupling devices and measured theirperformance in order to validate the proposed technique. One couplingdevice (see FIGS. 3A, 3B) was fabricated without the present inventionbeing implemented, while the other was fabricated with the presentinvention being implemented (see FIGS. 5A, 5B)

[0071] In FIG. 6 the S-parameter responses S1, S22, S33, S44 (in dB) ofthe input return loss at each of the four ports P1 to P4 are plottedversus frequency (in GHz). This is shown in the respective upper plot ofFIGS. 6A and 6B. The input return loss is the ratio between the energyreturned at a port i and the energy input at said port i. (In the chosenexamples described herein, i ranges from i=1 to 4). Also, in therespective lower plots of FIGS. 6A and 6B, the S-parameter responses S31and S42 of the through parameters (in dB) are plotted versus frequency(in GHz). The through parameter S_(ki) is the ratio of the energy outputat a port k when input at a port i. (Note that port P3 is isolated fromport P1, while also port P4 is isolated from port P2) Both couplers weredesigned to operate in the 1750 MHz frequency range, and the results onisolation and matching for the two cases are presented in FIGS. 6A and6B, respectively. It may be seen from FIG. 6A that the uncompensatedcoupler offers low performance that would be not acceptable in practicalapplications while the compensated novel coupler (FIG. 6B) offerssuperior performance with better than −22 dB matching at all ports andbetter than −26 dB isolation.

[0072] Accordingly, as has been described herein above, the presentinvention proposes a coupling device, comprising a substrate 1, aconductive layer 2 covering a first surface of said substrate 1, atleast two electromagnetically coupled lines 3 a, 3 b being providedopposite to said first surface and at least one thereof being covered byat least one cover layer 4, 5, wherein at least one capacitor C1, C2,C3, C4 is connected between a first end of at least one of said at leasttwo lines 3 a, 3 b and said conductive layer 2. The at least onecapacitor is a buried capacitor grounded in order to equalize unequalphase velocities otherwise degrading the performance of e.g. broadsidecoupled structures in an inhomogeneous substrate structure such as forexample microstrips in a multilayer LTCC. Therefore the presentinvention enables coupling devices having a high performance andoffering in that way the best of all possible design scenarios in termsof wideband performance, size and cost.

[0073] Although the present invention has been described herein abovewith reference to its preferred embodiments, it should be understoodthat numerous modifications may be made thereto without departing fromthe spirit and scope of the invention. It is intended that all suchmodifications fall within the scope of the appended claims.

1. A coupling device, comprising a substrate (1), a conductive layer (2)covering a first surface of said substrate (1), at least twoelectromagnetically coupled lines (3 a, 3 b) being provided opposite tosaid first surface and at least one thereof being covered by at leastone cover layer (4, 5), wherein at least one capacitor (C1, C2, C3, C4)is connected between a first end of at least one of said at least twolines (3 a, 3 b) and said conductive layer (2)
 2. A coupling deviceaccording to claim 1, wherein said at least two lines (3 a, 3 b) arearranged at different distances from said first surface of saidsubstrate (1)
 3. A coupling device according to claim 2, wherein adifference between the distances in which said at least two lines (3 a,3 b) are arranged from said first surface of said substrate (1) isdetermined by a thickness of a first cover layer (4) covering a firstline (3 b) of said at least two lines.
 4. A coupling device according toclaim 2 or 3, wherein a first line (3 b) and a second line (3 a) of saidat least two lines are arranged such that they at least partly overlapeach other.
 5. A coupling device according to claim 3, furthercomprising a second cover layer (5) arranged to cover at least a secondline (3 a) of said at least two lines.
 6. A coupling device according toclaim 4, wherein the amount of overlap adjusts the degree ofelectromagnetic coupling between said at least two lines.
 7. A couplingdevice according to claim 1, wherein said capacitor (C1, C4) isconstituted by a conductive member (C1, C4) embedded in said substrate(1) and facing said conductive layer (2) covering said first surface ofsaid substrate (1), and an electrical connection (W1, W4) from saidfirst end of said at least one of said at least two lines (3 a, 3 b) tosaid conductive member (C1, C4).
 8. A coupling device according to claim7, wherein said connection is a via connection.
 9. A coupling deviceaccording to claim 7, wherein the capacitance of said capacitor isdetermined by the area of said conductive member (P1, P4), the distancebetween said conductive member (P1, P4) and said conductive layer (2)covering said first surface of said substrate (1), and the dielectricconstant of said substrate.
 10. A coupling device according to claim 1,wherein said at least one cover layer (4, 5) is of the same material assaid substrate (1).
 11. A coupling device according to any of thepreceding claims, wherein said substrate (1) is made of a dielectricmaterial.
 12. A coupling device according to any of the precedingclaims, wherein said conductive layer (2) is connectable to groundpotential.